Fundamental simulation studies of CONWIP in front-end wafer fabrication

Production planning and control in semiconductor manufacturing is complicated by high-level of re-entrant. Job batching is commonly used to reduce required setup time and maximize workstation utilization. New research promotes CONWIP in pull production systems, while limiting overall work-in-process...

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Main Authors: Muhammad, N.A., Chin, J.F., Kamarrudin, S., Chik, M.A., Prakash, J.
Format: Article
Institution: Universiti Teknologi Petronas
Record Id / ISBN-0: utp-eprints.31375 /
Published: Taylor and Francis Ltd. 2015
Online Access: https://www.scopus.com/inward/record.uri?eid=2-s2.0-84930592456&doi=10.1080%2f21681015.2015.1045562&partnerID=40&md5=b16182f183bff3f8d4d067faee24e4b0
http://eprints.utp.edu.my/31375/
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spelling utp-eprints.313752022-03-26T03:18:23Z Fundamental simulation studies of CONWIP in front-end wafer fabrication Muhammad, N.A. Chin, J.F. Kamarrudin, S. Chik, M.A. Prakash, J. Production planning and control in semiconductor manufacturing is complicated by high-level of re-entrant. Job batching is commonly used to reduce required setup time and maximize workstation utilization. New research promotes CONWIP in pull production systems, while limiting overall work-in-process. However, the implications of batching on CONWIP systems have not been well studied. This paper describes a series of simulation studies and adopted ANOVA and response surface methodology to investigate the effects and relationship of batching on different numbers of CONWIP cards, demand composition, re-entrant, and setup times. Simulation results show that all batching systems exhibited a high number of CONWIP cards and low job mix, total layers, and setup times when the lowest average flow time as well as the highest throughput level and workstation utilization are achieved. The overall result reveals that batching systems outperform non-batching systems in the simulation model of a CONWIP production control system in semiconductor manufacturing. © 2015 Chinese Institute of Industrial Engineers. Taylor and Francis Ltd. 2015 Article NonPeerReviewed https://www.scopus.com/inward/record.uri?eid=2-s2.0-84930592456&doi=10.1080%2f21681015.2015.1045562&partnerID=40&md5=b16182f183bff3f8d4d067faee24e4b0 Muhammad, N.A. and Chin, J.F. and Kamarrudin, S. and Chik, M.A. and Prakash, J. (2015) Fundamental simulation studies of CONWIP in front-end wafer fabrication. Journal of Industrial and Production Engineering, 32 (4). pp. 232-246. http://eprints.utp.edu.my/31375/
institution Universiti Teknologi Petronas
collection UTP Institutional Repository
description Production planning and control in semiconductor manufacturing is complicated by high-level of re-entrant. Job batching is commonly used to reduce required setup time and maximize workstation utilization. New research promotes CONWIP in pull production systems, while limiting overall work-in-process. However, the implications of batching on CONWIP systems have not been well studied. This paper describes a series of simulation studies and adopted ANOVA and response surface methodology to investigate the effects and relationship of batching on different numbers of CONWIP cards, demand composition, re-entrant, and setup times. Simulation results show that all batching systems exhibited a high number of CONWIP cards and low job mix, total layers, and setup times when the lowest average flow time as well as the highest throughput level and workstation utilization are achieved. The overall result reveals that batching systems outperform non-batching systems in the simulation model of a CONWIP production control system in semiconductor manufacturing. © 2015 Chinese Institute of Industrial Engineers.
format Article
author Muhammad, N.A.
Chin, J.F.
Kamarrudin, S.
Chik, M.A.
Prakash, J.
spellingShingle Muhammad, N.A.
Chin, J.F.
Kamarrudin, S.
Chik, M.A.
Prakash, J.
Fundamental simulation studies of CONWIP in front-end wafer fabrication
author_sort Muhammad, N.A.
title Fundamental simulation studies of CONWIP in front-end wafer fabrication
title_short Fundamental simulation studies of CONWIP in front-end wafer fabrication
title_full Fundamental simulation studies of CONWIP in front-end wafer fabrication
title_fullStr Fundamental simulation studies of CONWIP in front-end wafer fabrication
title_full_unstemmed Fundamental simulation studies of CONWIP in front-end wafer fabrication
title_sort fundamental simulation studies of conwip in front-end wafer fabrication
publisher Taylor and Francis Ltd.
publishDate 2015
url https://www.scopus.com/inward/record.uri?eid=2-s2.0-84930592456&doi=10.1080%2f21681015.2015.1045562&partnerID=40&md5=b16182f183bff3f8d4d067faee24e4b0
http://eprints.utp.edu.my/31375/
_version_ 1741197562882293760
score 11.62408

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