A hybrid delay design-for-testability for nonseparable RTL controller-data path circuits
Path delay testing has become crucial nowadays due to the advancement in process technology. Only enhanced scan (ES) among the scan approaches provides a solution to test the path delay fault (PDF) with large area overhead and the long test application time. This paper proposes a hybrid DFT method f...
| Main Authors: | Shaheen, A.-U.-R., Hussin, F.A., Hamid, N.H. |
|---|---|
| Format: | Article |
| Institution: | Universiti Teknologi Petronas |
| Record Id / ISBN-0: | utp-eprints.19623 / |
| Published: |
World Scientific Publishing Co. Pte Ltd
2017
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| Online Access: |
https://www.scopus.com/inward/record.uri?eid=2-s2.0-84986626712&doi=10.1142%2fS0218126617500219&partnerID=40&md5=3964dfa7a567df3c1f3ad9908acfd163 http://eprints.utp.edu.my/19623/ |
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