Resistive open faults detectability analysis and implications for testing low power nanometric ICs
Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result in delay faults that cause timing failures and reliability risks. The nonmonotonic dependence of ROF-induced delay faults on the supply voltage (VDD) poses a concern as to whether single-VDD testing wi...
| Main Authors: | Mohammadat, M.T., Ali, N.B.Z., Hussin, F.A., Zwolinski, M. |
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| Format: | Article |
| Institution: | Universiti Teknologi Petronas |
| Record Id / ISBN-0: | utp-eprints.25997 / |
| Published: |
Institute of Electrical and Electronics Engineers Inc.
2015
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| Online Access: |
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85028167359&doi=10.1109%2fTVLSI.2014.2312357&partnerID=40&md5=4223a475ce8fe75f1283bb08f2e1cb4b http://eprints.utp.edu.my/25997/ |
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| Summary: |
Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result in delay faults that cause timing failures and reliability risks. The nonmonotonic dependence of ROF-induced delay faults on the supply voltage (VDD) poses a concern as to whether single-VDD testing will suffice for low power nanometric designs. Our analysis shows multi-VDD tests could be required, depending on the test speed. This knowledge can be exploited in small delay fault testing to reduce the chances of test escapes while minimizing cost. © 1993-2012 IEEE. |
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