Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening

An enhanced structure for Single-Event Burnout (SEB) hardening in trench gate shielded power UMOSFET is presented in this work. The proposed power MOSFET structure includes an n-type region wrapping p+ shielded region underneath the gate trench and adds an n-buffer layer between the epitaxial layer...

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Main Authors: Krishnamurthy, S., Kannan, R., Hussin, F.A., Yahya, E.A.
Format: Conference or Workshop Item
Institution: Universiti Teknologi Petronas
Record Id / ISBN-0: utp-eprints.23535 /
Published: Institute of Electrical and Electronics Engineers Inc. 2019
Online Access: https://www.scopus.com/inward/record.uri?eid=2-s2.0-85078311992&doi=10.1109%2fRSM46715.2019.8943495&partnerID=40&md5=7c8ac635c0f811653efb271a9f089524
http://eprints.utp.edu.my/23535/
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id utp-eprints.23535
recordtype eprints
spelling utp-eprints.235352021-08-19T07:57:36Z Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening Krishnamurthy, S. Kannan, R. Hussin, F.A. Yahya, E.A. An enhanced structure for Single-Event Burnout (SEB) hardening in trench gate shielded power UMOSFET is presented in this work. The proposed power MOSFET structure includes an n-type region wrapping p+ shielded region underneath the gate trench and adds an n-buffer layer between the epitaxial layer and substrate. With SILVACO ATLAS software, the standard and hardened UMOSFET are investigated to prove that the added n-region spreads out the electrons to the downward direction and the buffer layer could provide a leaking path of hole current and improve the device's tolerance to single-event burnout. The simulation results show that the electric field in the hardened structure is reduced when compared to a standard structure, and the SEB survivability also increased significantly. Meanwhile, there is no impact on the enhanced electrical characteristics namely threshold and breakdown voltages. Hence, for space and atmospheric applications, this power MOSFET provides high SEB survivability. © 2019 IEEE. Institute of Electrical and Electronics Engineers Inc. 2019 Conference or Workshop Item NonPeerReviewed https://www.scopus.com/inward/record.uri?eid=2-s2.0-85078311992&doi=10.1109%2fRSM46715.2019.8943495&partnerID=40&md5=7c8ac635c0f811653efb271a9f089524 Krishnamurthy, S. and Kannan, R. and Hussin, F.A. and Yahya, E.A. (2019) Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening. In: UNSPECIFIED. http://eprints.utp.edu.my/23535/
institution Universiti Teknologi Petronas
collection UTP Institutional Repository
description An enhanced structure for Single-Event Burnout (SEB) hardening in trench gate shielded power UMOSFET is presented in this work. The proposed power MOSFET structure includes an n-type region wrapping p+ shielded region underneath the gate trench and adds an n-buffer layer between the epitaxial layer and substrate. With SILVACO ATLAS software, the standard and hardened UMOSFET are investigated to prove that the added n-region spreads out the electrons to the downward direction and the buffer layer could provide a leaking path of hole current and improve the device's tolerance to single-event burnout. The simulation results show that the electric field in the hardened structure is reduced when compared to a standard structure, and the SEB survivability also increased significantly. Meanwhile, there is no impact on the enhanced electrical characteristics namely threshold and breakdown voltages. Hence, for space and atmospheric applications, this power MOSFET provides high SEB survivability. © 2019 IEEE.
format Conference or Workshop Item
author Krishnamurthy, S.
Kannan, R.
Hussin, F.A.
Yahya, E.A.
spellingShingle Krishnamurthy, S.
Kannan, R.
Hussin, F.A.
Yahya, E.A.
Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening
author_sort Krishnamurthy, S.
title Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening
title_short Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening
title_full Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening
title_fullStr Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening
title_full_unstemmed Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening
title_sort enhanced trench shielded power umosfet for single event burnout hardening
publisher Institute of Electrical and Electronics Engineers Inc.
publishDate 2019
url https://www.scopus.com/inward/record.uri?eid=2-s2.0-85078311992&doi=10.1109%2fRSM46715.2019.8943495&partnerID=40&md5=7c8ac635c0f811653efb271a9f089524
http://eprints.utp.edu.my/23535/
_version_ 1741196691293339648
score 11.62408

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